
DSD1792
SLES067B MARCH 2003 REVISED NOVEMBER 2006
www.ti.com
48
9 Packets
× 32 Bits
LRCK
BCK
DI
CMD
Don’t Care
DCI1
DCO1
DID = 1
DCI2
DCO2
DID = 2
DCI3
DCO3
DID = 3
DCI4
DCO4
DID = 4
IN Daisy Chain
CMD
Ch1
Ch2
Ch3
Ch4
Ch5
Ch6
Ch7
Ch8
1/fS (384 BCK Clocks)
Figure 58. DCO Output Timing of TDMCA Mode Operation
DID = 1
DID = 2
DID = 8
Don’t Care
DCI
DCO
DCI
DCO
DCI
DCO
LRCK
BCK
DI
CMD
Ch1
Ch16
CMD
Ch2
Ch15
14 BCK Delay
2 BCK Delay
5 Packets
× 32 Bits
1/fS (256 BCK Clocks)
Figure 59. DCO Output Timing With Skip Operation